MediaTek Inc. (TSEC: 2454] is a global fabless semiconductor company committed to revolutionizing the digital multimedia and communications landscape, enabling the smart ecosystem by bringing premium performance to mainstream devices. We are looking for PHYSICAL DESIGN ENGINEER, DESIGN VERIFICATION ENGINEER. Apply to…
MediaTek Inc
MediaTek Inc. (TSEC: 2454] is a global fabless semiconductor company committed to revolutionizing the digital multimedia and communications landscape, enabling the smart ecosystem by bringing premium performance to mainstream devices.
Through constant innovation, we’re poised to provide the best IC products and services to meet current and future needs for entertainment, communication and information. Join us, as we surge ahead with the vision to enhance and enrich the lives of all.
CAREEROPPORTUNITIES IN SINGAPORE
DESIGN VERIFICATION ENGINEER
Responsibilities
Perform Constrained-Random Verification using SystemVerilog
Develop verification environment for DUT
Write and debug tests for DUT using SystemVerilog. Perl and C
Develop Bus Functional Model (BFM) or use Verification IP (VIP) for tests
Develop and review test plans
Write coverage monitors to evaluate the coverage of DUT
Requirements
Bachelor’s/Masters Degree in Electrical/Electronics/Computer Engineering
Experience in SystemVerilog/VMM/OVM/UVM (UVM is a plus)
Familiarity with transaction-level verification at higher-level of abstractions is a plus
Experience in formal verification using SystemVerilog Assertion to verify SOC or IP is a plus
Experience in developing measurable verification plan
Proficiency in UNIX scripting languages and utilities such as csh, sed, awk and Perl
PHYSICAL DESIGN ENGINEER
Responsibilities
Fully responsible for Netlist-to-GDS physical design implementation of low power chips
Requirements
Bachelor’s/Masters Degree in Electrical/Computer Engineering
Experience in physical design with tapeouts
Knowledge of complete Netlist-to-GDS flow, including floor planning, power-grid synthesis, place opt. and routing, CTS, timing closure, signal integrity, STA and physical verification
Knowledge of Synopsys/Cadence tools like ICC or Encounter
Expertise in low power design implementation or flow development
Expertise in hierarchical design implementation is a plus
Good in script programming with Perl, TCL/TK or other languages
Interested applicants, please send your detailed resume to: recruit.sg@mediatek.com